Head of team
Erven ROHOU (Resarch director, Inria)

PACAP : Processor Architecture and Compilation for Application Performance

The long-term goal of PACAP is about performance, that is: how fast programs run.
Traditionally, the term “performance” is understood as “how much time is needed to complete execution”. Latency-oriented techniques focus on minimizing the average-case execution time. We are also interested in other definitions of performance. Throughput-oriented techniques are concerned with how many units of computations can be completed per unit of time. This is more relevant on manycores and GPUs where many computing nodes are available. Finally, we also study worst-case execution time, which is extremely important for critical real-time systems where designers must guarantee that deadlines are met, in any situation. Given the complexity of current systems, simply assessing their performance has become a non-trivial task which we plan to tackle.
We occasionally consider other related metrics, such as power efficiency, total energy, or overall complexity. Our ultimate goal is to propose solutions that make computing systems more efficient, taking into account current and envisioned applications, compilers, runtimes, operating systems, and micro-architectures. Identifying the related trade-offs is of interest to PACAP.
The previous decade witnessed the end of the “magically” increasing clock frequency and the introduction of commodity multicore processors. PACAP is experiencing the end of Moore's law, and the generalization of commodity heterogeneous manycore processors. This impacts how performance is increased and how it can be guaranteed. It is also a time where exogenous parameters should be promoted to first-class citizens:

  • the existence of faults, whose impact is becoming increasingly important when the photo-lithography feature size decreases;
  • the need for security at all levels of computing systems;
  • green computing, or the growing concern for power consumption.

The activities of PACAP are organized along the following three research axes:

  1. Program Analysis and Optimization: we are interested in static compilation, taking into consideration new and upcoming technologies (non-volatile RAM, quantum computing, WCET for complex and heterogeneous multicores), as well as dynamic optimizations.
  2. Computer Architecture: our work includes branch prediction, value prediction, compressed caches, and predictable hardware.
  3. Security: this is a transversal axis where we team up with security experts, providing expertise in microachitecture, compilation, and optimization.


Creation date
Reporting institution
Inria, Université de Rennes 1
Campus de Beaulieu, RENNES (35)
Activity reports
Attachment Size
PACAP-RA-2023.pdf 545.5 KB
PACAP-RA-2022.pdf 545.68 KB
PACAP-RA-2021.pdf 569.57 KB
pacap2019_0.pdf 519.79 KB
pacap2018.pdf 528.32 KB
pacap2017.pdf 526.13 KB