Energy-aware execution model for normally-off platforms

Submitted by Agnes COTTAIS on
Team
Date of the beginning of the PhD (if already known)
Octobre 2020
Place
IRISA - Campus universitaire de Beaulieu, Rennes
Laboratory
IRISA - UMR 6074
Description of the subject

Context

To face modern environmental challenges (energy scarcity, global warming and pollution caused by the use of fossil energy), the objective of the NOP (Normally-Off Plaforms) project is to design energy efficient, and sustainable Internet-of-Things (IoT) nodes. The nodes will use energy harvesting systems, that are more sustainable than batteries, as well as non-volatile memory technologies to retain information when the system is off. The resulting platform is termed normally-off and computations are transient, because the system operates only when there is enough energy available. In such a system, power failures are not handled as faults, but rather as normal
events.

Thesis objectives

The objective of the thesis will be to define an energy-aware execution model for transient computing in NOP. The definition of the execution model will encompass the definition of the appropriate abstractions for transient computing and the definition of associated compiler and run-time support. The execution model will extend well-established standards used in embedded real-time systems, such as for example the OSEK-VDX task model. This energy-aware execution model will be built by leveraging ad-hoc compiler and runtime techniques.

  • On the compiler side, information on tasks will be computations using code analysis techniques, possibly complemented with user-provided information. An example of information will be the type of task: for example, atomic tasks will denote calculations that have to be performed atomically In our context, atomic means that a task shall not be interrupted because of a power outage.  (because they perform I/O, have side-effects, or are short enough to be executed atomically), whereas non atomic tasks are compute-intensive tasks that can be stopped and restarted in case of energy shortage. Code analysis techniques will be used to identify good possible checkpoint locations for non atomic tasks (where a power loss can be safely handled), as well as the set of live variables to save at each point. The identification of possible checkpoint locations will operate under constraints (time interval or energy between possible checkpoints, memory constraints). The identification will leverage state-of-the-art Worst Case Execution Time (WCET) and/or Worst Case Energy Consumption (WCEC) analysis techniques. Code transformation techniques will be designed to optimize the code, towards the insertion of new possible checkpoint locations when the initial code does not contain enough of them, or when some constraints are not met. For example, loop splitting could be used to avoid checkpointing within a loop, thereby meeting memory constraints.
  • On the runtime system side, a dedicated component, based on existing operating system technology, will be built.  It will be in charge of restoring the state of the system at each startup, based on previously saved information.  Its main role will be to schedule tasks. Scheduling will be based on the type of task (atomic, non atomic), possibly task priorities, the information on execution time and energy consumption provided by the compiler, and most importantly the energy budget, provided an energy management component. The energy management component will provide an API to get the current energy budget in a given time window in the future, given the current energy budget and the energy harvesting activity. For example, for an non-atomic task, the scheduler may checkpoint its state when the next possible checkpoint is not safely reachable. It may also prefer to checkpoint earlier if the state is smaller because fewer variables are alive (information provided by the compiler).  For an atomic task, it will decide if it should be postponed until more energy is available to enforce atomicity and data consistency.

The developed research will be experimented on the IoT nodes of the NOP platform on a realistic use-case, for example in the domain of smart builings.

Bibliography
  • R. Bouziane, E. Rohou, and A. Gamatié. Energy-Efficient Memory Mappings based on Partial WCET Analysis and Multi-Retention Time STT-RAM. In Real-Time Networks and Systems (RTNS), 2018.
  • A. Colin and B. Lucia. Termination checking and task decomposition for task-based intermittent programs. In Compiler Construction (CC), 2018.

  • G. Berthou, T. Delizy, K. Marquet, T. Risset, and G. Salagnac. Sytare: A lightweight kernel for NVRAM-based transiently-powered systems. IEEE Trans. Comput., 68(9), 2019.

  • B. Lucia, V. Balaji, A. Colin, K. Maeng, and E. Ruppel. Intermittent Computing: Challenges and Opportunities. In Summit on Advances in Programming Languages (SNAPL), volume 71 of LIPIcs, 2017.

  • D. Solet, J.-L. Béchennec, M. Briday, S. Faucou, and S. Pillement. Hardware runtime verification of a RTOS kernel: Evaluation using fault injection. In 14th European Dependable Computing Conference (EDCC), 2018.

  • D. Hardy, B. Rouxel, and I. Puaut. The Heptane Static Worst-Case Execution Time Estimation Tool. In 17th International Workshop on Worst-Case Execution Time Analysis (WCET), volume 8, 2017.

Researchers

Lastname, Firstname
Erven ROHOU
Type of supervision
Director
Laboratory
UMR 6074, Inria

Lastname, Firstname
Isabelle PUAUT
Type of supervision
Co-director (optional)
Laboratory
UMR 6074, Inria

Lastname, Firstname
Mikaël BRIDAY
Type of supervision
Supervisor (optional)
Laboratory
LS2N Nantes

Lastname, Firstname
Jean-Luc BÉCHENNEC
Type of supervision
Supervisor (optional)
Laboratory
LS2N Nantes

Lastname, Firstname
Sébastien FAUCOU
Type of supervision
Supervisor (optional)
Laboratory
LS2N Nantes
Contact·s
Keywords
Transient computing, energy harvesting, energy management, compilation, embedded operating system, architecture