Les invités du mois : Joel Emer & Moinuddin Qureshi

50 ans - Keynote IRISA
Starting on
Ending on
Location
IRISA Rennes
Room
Espace conférences Inria
Main department
D3 - Architecture

Visuel de promotion de la conférence des invités du mois : Joel Emer et Moinuddin Qureshi

 

Introducing Joel Emer and Moinuddin Qureshi
by André Seznec, IRISA alumni

 
IRISA has been created 50 years ago.  At that time, computers were a rare, voluminous and expensive resource. Nowadays, they have become ubiquitous in our every day life. They are present very cheap appliances, our cell phones, our labtops but also in multi-millions euros supercomputers. For the general public, this  technology revolution is often seen as the conjunction of  extraordinary progresses in hardware integration, and  the invention of new algorithms  and new applications.  However this revolution would not have been possible without the intermediate layers: computer architecture, operating systems, languages and compilers.
 
This session of the "invités du mois" will focused  on computer architecture with two prestigious invitees, Joel Emer and Moinuddin Qureshi.
 
Computer architecture is one of the domains where the influence of research on industry  has been particularly strong.
Joel Emer and Moinuddin Qureshi have both academic and industrial profiles. Many products have been influenced by their research.
 
The PhD work from Moinuddin Qureshi (2007) has influenced the management of the caches of all the processors that have been designed during the past decade. After working at IBM research and directly participating to the design of the IBM power series memory systems, Moinuddin joined Georgia Tech as a professor. Moinuddin is one of the most prolific researchers in computer architecture, with  major contributions on cache management, memory systems (both volatile and non-volatile), cache security, and quantum computing. Moinuddin, one of the pillar of computer architecture community,  got the ACM Maurice Wilkes award in 2022.  Professor Qureshi will present his recent work on DRAM  reliability  and quantum computing architecture.
 
Joel Emer began his PhD studies at the time IRISA was created. For the last 50 years, Joel has been a witness and a major  actor in computer architecture. His contributions have been numerous all along his career at DEC on VAX, then Compaq on Alpha  in the last millenium and  on x86 processors at Intel in the 2000's. Joel is now working at Nvidia as well as  at  MIT. Among the many contributions he made, I would emphasize that he was one of the earlier proposer of  the quantitative approach to processor performance evaluation,  he was one of main actor in the definition of simultaneous multithreading and he was one of the first researchers to present a memory dependence predictor. His more recent work includes  deep learning accelerator design and spatial and parallel architectures. Many of  his contributions were published at the computer architecture research conferences. Joel's deep influence on the computer architecture research community as well as on the processor industry was recognized in 2009 by the prestigious  ACM-IEEE Eckert-Mauchly award. For his contributions on new topics after the Eckert-Mauchly award, he got the 2023 IEEE B. Rau award. Joel will share his perspective on the evolution of computer architecture over the last 50 years.

 

Program

These talks are open to a non-specialist audience interested in architecture (in English).


🕒 14:00 ⭢ 15:30 - Talk by Joel Emer

🥐 15:30 ⭢ 15:45 - Coffee break

 
 

🕒 15:45 ⭢ 17:15 - Talk by Moinuddin Qureshi


✍️ Mandatory registration

https://framaforms.org/guests-of-the-month-joel-s-emer-moinuddin-qureshi-conference-1744817591

 

 

First talk - Joel S. Emer
14:00 ⭢ 15:30


It All Depends: A Personal Perspective on the Evolution of Computer Architecture
 

Over my nearly 50 year career in computer architecture research processor performance has improved by over three orders of magnitude. Those improvements have been premised on improvements at every level of a long-standing stack of abstractions. That stack is comprised of: (1) algorithms expressed in programming languages that are (2) converted by compilers into sequences of instructions that are (3) executed on computer architectures that are (4) implemented using transistors in the latest technology.

In this talk, I am going focus on the computer architecture level of the stack, where execution of instructions occurs. At that level, the intrinsic nature of instructions has remained relatively constant, but the techniques to execute them quickly have evolved significantly. At its heart, however, executing instructions is a step-by-step process where each step depends on information generated at prior steps. And therefore, dealing with those dependencies is what determines the performance of the architecture. So in the first part of this talk, I will frame a number of the techniques that have been employed to optimize performance as instances of a set of methods that can mitigate the impact of dependencies between (and within) instructions.

Although the abstraction stack and nature of instructions has remained remarkably constant over more than the last 50 years, that is now likely to change. That is due to the end of long-term technology scaling trends (usually
referred to as Moore's Law and Denard scaling) that is limiting the ability to keep making improvements without changing stack or at least the interfaces between levels. So in the second part of the talk, I will discuss my
philosophical perspective on the important attributes of the existing stack and provide some thoughts on how to both preserve those attributes and improve performance.

 

Second talk - Moin Qureshi
15:45 ⭢ 17:15


Reliability Matters: From Extending Moore’s Law to Enabling Quantum Leap

 

The primary role of a computing system is to reliably perform the tasks it is assigned. Factors such as performance and power efficiency are meaningful only so long as the system can reliably execute the specified computations. As Moore's Law reaches its limits, devices are becoming less reliable and are experiencing new types of failures. Addressing these reliability challenges efficiently is crucial to scaling to smaller technology nodes. Moreover, reliability tends to be a significant hurdle for all emerging technologies, whether it's new memory technologies, DNA storage, or quantum computing. Successfully overcoming the reliability challenges also plays a crucial role in enabling the emerging technologies.

In this talk, I will share our recent work on DRAM reliability and quantum computing to show how efficiently addressing device failures can help us push the boundaries -- whether extending Moore's Law or enabling quantum computing.

 

Biographies


More about Joel Emer
 

Photo de Joel EmerJoel S. Emer is a Professor of the Practice at MIT's Electrical Engineering and
Computer Science Department (EECS) and a member of the Computer Science and Artificial Intelligence Laboratory (CSAIL). He is also a Senior Distinguished Research Scientist at Nvidia in Westford, MA, where he is responsible for exploration of future architectures as well as modeling and analysis methodologies. Prior to joining Nvidia, he worked at Intel where he was an Intel Fellow and Director of Microarchitecture Research. Previously he worked at Compaq and Digital Equipment Corporation (DEC).

For nearly 50 years, Dr. Emer has held various research and advanced development positions investigating processor micro-architecture and developing performance modeling and evaluation techniques. He has made architectural contributions to a number of VAX, Alpha and X86 processors and is recognized as one of the developers of the widely employed quantitative approach to processor performance evaluation. He has also been recognized for his contributions in the advancement of deep learning accelerator design, spatial and parallel architectures, processor reliability analysis, memory dependence prediction, pipeline and cache organization, performance modeling methodologies and simultaneous multithreading. He earned a doctorate in electrical engineering from the University of Illinois in 1979. He received a bachelor's degree with highest honors in electrical engineering in 1974, and his master's degree in 1975 -- both from Purdue University. Among his honors, he is a Fellow of both the ACM and IEEE, and a member of the NAE. He also received both the Eckert-Mauchly award and the B. Ramakrishan Rau award for lifetime contributions in computer architecture.

 


More about Moinuddin Qureshi
 

Photo of Moin QureshiMoinuddin Qureshi is a Professor of Computer Science at Georgia Tech. His research interests include memory systems, hardware security, and quantum computing. Prior to Georgia Tech, he was a research scientist at IBM T. J. Watson (2007-2011), where he developed caching algorithms for Power-7. Qureshi received the 2022 ACM SIGARCH Maurice Wilkes Award for “contributions to high-performance memory systems” and is a fellow of ACM and IEEE. His research has been recognized with several best-paper awards, multiple inclusions at the ISCA-50 retrospective, and several "impact" awards, including the recent MICRO-2024 Test-of-Time Award. Qureshi is passionate about teaching and mentoring students. Several of his former PhD advisees are faculty members at top academic institutions. Qureshi received the 2024 "Outstanding Doctoral Thesis Advisor Award" at Georgia Tech.

 


This event is part of IRISA's 50th anniversary celebrations.
More details about the program on the dedicated page of our website.


Logo des 50 ans de l'IRISA