Efficient designs of on-board heterogeneous embedded systems for space applications

Space payload data processing has been conducted on the ground because of the performance limit of on-board processing platforms. However, thanks to the recent space-qualified heterogeneous System-on-Chips, it is expected to partially migrate data processing pipelines on the ground to the on-board data processing platform of satellites. However, because of the different characteristics of CPUs and FPGAs, it is difficult to perform hardware/software co-design efficiently. Especially, because of the reconfigurable characteristics of FPGAs, we need hardware-specific and application-specific Design Space Exploration (DSE) based on several objective functions. In this Ph.D dissertation, we propose efficient DSE methodologies dedicated to hardware/software co-design. We propose an adapted roofline performance model to compare different hardware/software implementations and suggest possible optimizations. Thus payload teams can decide on a suitable implementation when they have several hardware/software libraries. Secondly, we propose a hardware/software DSE estimation tool that facilitates users to select a proper hardware target quickly without an exhaustive design process. The tool uses the LLVM intermediate representation and LLVM’s analysis and transform passes. It takes as input a user-defined algorithm at a high level and the tool provides a proper hardware target and High-Level Synthesis (HLS) optimizations for FPGA designs, which can help users who would like to implement a payload-specific algorithm from scratch and need to select a proper target hardware between a CPU and an FPGA.