ReMIX Project     

A Reconfigurable Memory for Indexing Mass of Data      

General
Overview
Project Summary
Publications
Intranet
People
Architecture
System
RMEM board
Programming
Framework
Operator Synthesis
Applications
Genomics
Images
Text
Support
Overview
ACI ReMIX
ARC INRIA
West Genopole
      
Project Summary
ReMIX Memory Specificity

It is important to point out that this new memory architecture is far from being a simple memory extension to substantially increase the memory capacity of a standard computer. The reasons are the following:
  • The reconfigurable index memory is not a simple storage device. It is enhanced with additional reconfigurable hardware resources for tailoring its use according to the index characteristics and to the data it manipulates.
  • The reconfigurable index memory does not fit in the addressing space of the processor. It is indirectly accessed by specific queries submitted by the processor in order to execute crucial and costly indexing subroutines.
  • The reconfigurable index memory does not hold any cache hierarchy, and therefore memory accesses do not have to worry about the data locality. Memory read operations have a unique cost, whatever the memory address, and whatever the previous memory accesses.
  • Due to the FLASH technology, writing operation are limitted. It only aims to periodicaly store huge volume of data while allowing unlimitted read access.

<<< previous                                                                  

  contact:

  Dominique Lavenier
  lavenier@irisa.fr

  http://www.irisa.fr/remix