The CACHESKEW simulator
Authors: André Seznec, Jérome Hédouin
Last Modification: Sept. 97
- A brief introduction to skewed-associativity
- General organization of the simulator
- How to test new replacement policies
- How to test new mapping functions
- The simulator package (as a tar file)
- Back to processor architecture research in CAPS team
The CACHESKEW simulator is provided as is in order to serve as a basis to develop cache simulators for testing ideas related to skewed-associative caches.
This package has been built in order to be easily modified for being able to test new indexing functions or new replacement policies.
The skewed associative cache is a new organization for multi-bank caches. Skewed-associative caches have been shown to have two major advantages over conventional set-associative caches.
First, at equal associativity degrees, a skewed-associative cache typically exhibits the same hardware complexity as a set-associative cache, but exhibits lower miss ratio.
This is particularly significant for BTBs and L2 caches for which a significant ratio of conflict misses occurs even on 2-way set-associative caches.
Second, the behavior of skewed-associative caches is quite insensitive to the precise data placement in memory.
Recently, we have shown that the skewed associative structure offers a
unique opportunity to build TLBs supporting multiple page sizes.
 A. Seznec, ``A case for two-way skewed-associative cache'',
Proceedings of the 20th International Symposium on Computer Architecture(IEEE-ACM), San Diego, may 1993
 A. Seznec, F. Bodin,
``Skewed-associative caches'' ,
Proceedings of PARLE' 93, Munich, June 1993
 A. Seznec, " About set and skewed associativity on second
level caches'', Proceedings of the International Conference on Computer Design,
Boston, October 1993
 F. Bodin, A. Seznec, "Skewed-associativity improves performance and enhances predictability",
IEEE Transactions on Computers, May 1997
(A short version appears in Proceedings of the 22th International Symposium on Computer Architecture
(IEEE-ACM), Santa-Margharita, June 1995)
 N. Drach, A. Gefflaut, P. Joubert, A. Seznec, ``About cache
associativity in low-cost shared memory multi-microprocessors'', Parallel Processing Letters, Sept. 1995
(also IRISA Report No 760)
 A. Seznec ``
A New Case for Skewed-Associativity``, 22 pages, IRISA Report No 1114, July 1997
 P. Michaud, ``A
Statistical Model of Skewed Associativity'', International Symposium
on Performance Analysis of Systems and Software, Austin, March 6-8,
 A. Seznec, ``Concurrent Support of Multiple Page Sizes on a Skewed
Associative TLB'', to appear in IEEE Transactions on Computers, 2003
The simulator is made to compare different replacement policies for a cache of a given size. This size is given as a parameter. The replacement policies are defined in the simulator and each of them is applied to a cache of equal size. Three differents sets of skewing functions are defined in the simulator and one of the parameters is used to decide which functions will be used during the simulation.
Two simulators CACHESKEW and CACHESKEWL2 are provided. CACHESKEW (rep. CACHESKEWL2) targets L1 (resp L2) caches.
In the current version of CACHESKEWL2, a direct-mapped split L1 cache is simulated. Inclusion property is enforced.
The L1 cache is 8Kbyte and has 16bytes cache line.
Usage: NAME NbMapfct CacheSize LogLine ResFile < SimFile
- NAME: CACHESKEW or CACHESKEWL2.
- NbMapfct: Number of the mapping function.
NbMapfct has to match with one of the possible choice given in initcache.c.
- CacheSize: Size in bytes of the cache.
- LogLine: Log base 2 of line size.
- ResFile: Result File.
- SimFile: Simulation File.
The different files constituing the CACHESKEW simulator are:
- mainess.c: the main file. The simulator currently accepts dinero-like entries. This file has to be adapted to the simulation file format.
- cacheLibrary.h: this library file is included in every other file. It contains most of the definitions.
- initcache.c: this file contains the different functions used for the initialisation of the caches.
- Sim.c: this is the file that simulates each memory access.
It access to the cache at the address read in the simulation file and on a miss it allocates a place in the cache with the replacement policy that has has been given during the initialisation.
- files whose names begin with mappingfct: each of those files contains the fonctions carrying into effect a skewing function.
- SetAsso.c and all the files beginning with "Skew" describe the different replacement policies.
- display.c: the purpose of this file is to create the result file.
The replacement policies provided here are described in ``A New Case for
Single-bit replacement policy --> SkewPseudoLRU.c
Usefulness policy --> SkewUseful.c
Not Recently Used --> SkewNRU.c
Not Recently Used + Useful --> SkewUNRU.c
Enhanced Not Recently Used --> SkewENRU.c
Feel free to test new replacement policies. Proceed as follows:
create a new file containing the replacement policy. ie the functions of allocation and of test of presence in the cache.
do not forget to add the name of your file in the makefile.
create a new array of caches in the file cacheLibrary.h .
add the initialisation of this array in the file initcache.c .
add the simulation of the caches in the file SimL1.c .
add the display of the result for this array of caches in the file display.c .
Feel free to test new skewing functions. Proceed as follows:
create a new file containing the mapping function that you wish to test.
add the name of this file in the makefile
create a new case in the file initcache.c