Campus de Beaulieu
35042 RENNES Cedex
Phone : +33 2 99 84 75 97
Fax : 02 99 84 71 71
Who am I?
After a thesis at IRISA/INRIA in Rennes (Brittany) with André Seznec
as advisor (defended in December 2000), two years spent as a research
engineer at Philips Research France (near Paris), I am back at IRISA since
Fecruary 2003 as an expert engineer (for 16 months). I work on the PACCMAN project (a
compiler for cryptography ASIP).
project (PlAteforme de Composants Cryptographiques pour
Multi-Applications Nationales), aims at designing and producing a
``French'' cryptographic platform. This platform will be composed of a
cryptography ASIP (Application Specific Integrated Processor) and a
complete compiler tool-chain (including debugger and profiler).
Past research activity
The research topic I was involved in when I was PhD student concerned
program trace collection. Program traces may consist of the
addresses of instructions executed and/or data referenced in an
application. These traces are useful to simulate microprocessor
architectures and/or memory hierarchies in order to evaluate their
performance (trace-driven, on-the-fly, or execution-driven
simulation). However, software trace collection induces
significant execution slowdown.
We have worked on a new cost
effective trace collection and on-the-fly simulation approach. The
original application code is lightly annotated to provide a fast
(direct) execution mode. An embedded instruction-set emulator enables
trace collection or on-the-fly simulations. At run time, dynamic
switches are enabled from the fast mode to the emulation mode by the
annotation code, and vice-versa.
The implementation of this
method is composed of an instrumentation tool, calvin2, and a
SPARC V9 instruction-set emulator: DICE (Dynamic Inner Code
Emulator). These tools are able to catch user-level activity and have
been extensively tested on the SPEC95
DICE has been extended to LiKE (Linux Kernel
Emulator) in order to trace/simulate partial operating system level
activity. LiKE is a dynamically loadable module and can be
incorporated to a very slightly patched Linux kernel at any
moment. However, the development of this tool has been stopped.
One of our main concerns was also enabling complete execution-driven
simulations with DICE. This will allow us to simulate realistic
microprocessors (e.g. speculative, out-of-order execution, ...) on
long running applications.
detailed description can be found here.
T. Lafage, A. Seznec, ``Choosing
Representative Slices of Program Execution for Microarchitecture Simulations:
A Preliminary Application to the Data Stream'', Workshop on Workload
Characterization (WWC 2000), September 2000.
T. Lafage, A. Seznec, ``Combining
Light Static Code Annotation and Instruction-Set Emulation for Flexible
and Efficient On-the-fly Simulation'', IRISA Technical Report no
1285, December 1999.
T. Lafage, A. Seznec, E. Rohou, F. Bodin, ``Code Cloning Tracing: A
"Pay per Trace" Approach'', in Euro-Par'99, Toulouse, August 1999.
T. Lafage, A. Seznec, E. Rohou, F. Bodin ``Code
Cloning Tracing: A New Approach to Trace Collection'', IRISA Technical
Report no 1176, March 1998.
A. Seznec, T. Lafage ``Évolutions
des gammes de processeurs MIPS, DEC Alpha, PowerPC, SPARC, x86 et PA-RISC'',
June 1997 (158 pages, postscript, 520 ko).