TaskMapper

Tasks placement tool for multiprocessor systems on a chip for Altera DE2 cards

Manual

Global functioning

The user interface is composed with 3 tabs :

Once the MPSoC is designed, it is possible to export the MPSoC model in a XML formated file.

The other function of TaskMapper is to evaluate the placement designed with the GUI. To evaluate a placement, the best way is to test. Taskmapper uses the design softwares developed by Altera : SoPC Builder, NIOS2-IDE, Quartus; and a FPGA card (Altera DE2) to implements the MPSoC.

Limitations

Conception constraints

extract from the reports and the presentations

The architecture intended to be implanted on MPSoC is based on NIOS 2. On each processor is running a ┬ÁC-OS 2 (wikipedia), allowing up to 20 tasks. These "software" tasks have to be programed in C, and to have a single priority (on the processor). In addition to the NIOS 2, it is possible to add co-processors. Each co-processor can process one task, programed in VHDL. The co-processors are connected to the bus by implication, that is why there is no possibility to add link between processors and co-processors in the architecture tab. Each co-processeur is a "SLAVE", and can not initiate any communication with memories or co-processors. Only the processors can communicate with co-processors.

Each NIOS 2 processor has to be linked to a instruction memory. It will read its instructions in this memory. Several processors can read in the same memory.

The differents components use three ways to communicate (see 2nd half presentation, slide 31 and following). In the case of communication between 2 tasks on differents NIOS 2 processors, the FIFO takes place in a common memory. TaskMapper does not handle transparently the creation of this memory. Regarding the communication with the co-processors, the FIFO takes place in a "covering" component, which acts as an interface with the bus.

While the model is not valid, it is not possible to generate the code or to process the execution on the card. For example, a co-processor with no task to process, or a missing memory between two NIOS 2 will be reported.

Each processor linked to the memory sdram_0 can use up to 1 Mo of this memory (code, stack, data). Regarding the other memories, it is possible to use only RAM memories (although ROM and SDRAM are available, SDRAM is reserved for sdram_0 memory, and ROM is not implemented).

First tab : KPN

  1. The menu allows to access the global functions of TaskMapper : open/save/create a new/generate the code for a project.
  2. The main part of the tab shows the Kahn Process Network.
  3. The right panel allows to edit some properties of the selected element (here a port).
  4. Select/move : allows to select and move the elements.
  5. Create a process : by double clicking in a empty space.
  6. Create a in port : by double clicking on a process.
  7. Create a out port : by double clicking on a process.
  8. Create a FIFO : by doing a drag and drop from a in port to a out port (or from out to in).
  9. Project Name : give a name to the project
  10. Workspace : specify where the code has to be compiled.
  11. Card Number : which card will be used (see jtagconfig).

It is possible to delete elements by hiting the DEL key while selecting an element. Moving the elements is possible by doing a drag and drop.

Second tab : architecture

  1. The main part of the tab shows the architecture model.
  2. The right panel allows to edit some properties of the selected element (here the sdram_0 memory).
  3. Select/move : allows to select and move the elements.
  4. Create a processor : by double clicking in a empty space.
  5. Create a co-processor : by double clicking in a empty space.
  6. Create a memory : by double clicking in a empty space.
  7. Add a instruction memory : links a processor and a memory to read the instructions.
  8. Add a data memory : links a processor and a data memory.
  9. Tools bar

It is possible to delete elements by hiting the DEL key while selecting an element. Moving the elements is possible by doing a drag and drop.

Third tab : Allocation

  1. The right part shows the "hardallocations", ie the VHDL tasks (only one by co-processor).
  2. The left part shows the "softallocations", ie the C tasks.
  3. The bottom part show the unallocated tasks.
  4. Generate the code : generates and compiles the code.
  5. Show Shell fram : send the compiled code to the card, and show the nios2-terminal.

The allocations are created by doing a drag and drop. The tasks' properties have to be specified here :

Editing VHDL

  1. The first part of the file specifies the headers. The headers are generated by TaskMapper and should not be changed (see reports).
  2. The second part defines the process.
  3. Do no forget to save.

nios2-terminal

  1. The begining is the initialisation of the terminal.
  2. The following lines show the execution on cpu_0 processor. Indeed, only one processor can communicate with the I/O terminal (the printf() on others processors will no be shown).

After execution, the terminal must be closed in order to access TaskMapper (this kill the nios2-terminal process, and interrupt the communication).

TaskMapper - 2007-2008
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