I am senior researcher with INRIA leading project-team TEA: "Time, Events and Architectures". We are interested in formally modelling time, concurrency, composition in cyber-physical systems and developing tools to support modular system design using formally specified analysis, verification and synthesis algorithms. On this page is information on projets I work on, pointers to the scientific communities I collaborate with, and links to most of my publications.
Publications
"Synthesis of embedded systems". Shukla, S., Talpin, J.-P., Editors. ISBN 978-1-4419-6399-4, Springer, 2010.
"Formal methods and models for system design". Gupta, R., Le Guernic, P., Shukla, S., Talpin, J.-P., Editors. ISBN 978-1-4020-8051-7, Springer, 2004.
"Cyber-Physical System Design from an Architecture Analysis Viewpoint". S. Nakajima, Talpin, J.-P., M. Toyoshima, H. Yu, Editors. Communications of the NII Shonan Meetings, Springer, 2017.
- "Compositional proofs in dynamic differential logic". S. Lunel, B. Boyer, J.-P. Talpin. International Conference on Applications of Concurrency to System Design (ACSD'17). Springer, 2017.
- "An Abstraction Technique For Parameterized Model Checking of Leader Election Protocols: Application to FTSP". O. Sankur, J.-P. Talpin. International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS'17). Springer, 2017.
- "Formal Semantics of Behavior Specifications in the Architecture Analysis and Design Language Standard". L. Besnard, T. Gautier, P. Le Guernic, C. Guy, J.-P. Talpin, B. R. Larson, E. Borde. Chapter in Cyber-Physical System Design from an Architecture Analysis Viewpoint, Communications of the NII Shonan Meetings. Springer, 2017.
- "Formal Semantics of Behavior Specifications in the Architecture Analysis and Design Language Standard (extended abstract)". L. Besnard, T. Gautier, P. Le Guernic, C. Guy, J.-P. Talpin, B. R. Larson, E. Borde. High-Level Design, Verification and Test (HLDVT'16). IEEE, 2016.
- "Integration of polychrony in the QGen model compiler". C. Junke, T. Gautier, J.-P. Talpin, L. Besnard. European Congress on Embeddd Real-Rime Software and Systems (ERTS'16), 2016.
- "Towards refinement types for time-dependent data-flow networks". J.-P. Talpin, P. Jouvelot, S. Shukla. ACM-IEEE Conference on Methods and Models for System Design (MEMOCODE'15). IEEE, 2015.
- "Polychronous automata". T. Gautier, P. Le Guernic, J.-P. Talpin, L. Besnard. Theoretical Aspects of Software Engineering (TASE'15), Awarded best paper. IEEE, 2015.
- "Modular translation validation of a full-sized synchronous compiler using off-the-shelf verification tools (abstract)". V. C. Ngo, J.-P. Talpin, T. Gautier, L. Besnard, P. Le Guernic. International Workshop on Software and Compilers for Embedded Systems (SCOPES'15), invited presentation. ACM, 2015.
- "Translation Validation for Synchronous Data-flow Specification in the SIGNAL Compiler". V. C. Ngo, J.-P. Talpin, T. Gautier. International Conference on Formal Techniques for Distributed Objects, Components and Systems (FORTE'15). IFIP, 2015.
- "Model-Based Integration for Automotive Control Software". H. Yu, P. Joshi, J.-P. Talpin, S. Shukla, S. Shiraishi. Digital Automation Conference (DAC'15), Automotive Special Session. ACM, 2015.
- "Translation validation for clock transformations in a synchronous compiler". V. C. Ngo, J.-P. Talpin, T. Gautier. International Conference on Fundamental Approaches to Software Engineering (ETAPS/FASE'15). Springer, 2015.
- "Mapping Functional Behavior onto Architectural Model in a Model Driven Embedded System Design". P. Joshi, S. K. Shukla, J.-P. Talpin, H. Yu. Symposium On Applied Computing (SAC'15). ACM, 2015.
- "Earliest-Deadline First Scheduling of Multiple Independent Dataflow". A. Bouakaz, T. Gautier, J.-P. Talpin. IEEE International Workshop on Signal Processing Systems (SIPS'14). IEEE, 2014.
- "Towards an architecture-centric approach dedicated to model-based virtual integration for embedded software systems (position paper)". H. Yu, J.-P. Talpin, S. Shukla, P. Joshi, S. Shiraishi. Workshop on Architecture Centric Virtual Integration (ACVI'14), 2014.
- "A constraint-solving approach to Faust program type checking". I. Frotier de la Messelière, P. Jouvelot, and J.-P. Talpin. Constraint Programming meets Verification (CP/CAV'14), 2014.
- "Efficient deadlock detection for polychronous data-flow specifications". C. Ngo, J.-P. Talpin, T. Gautier. Electronic System Level Synthesis Conference (ESLSYN'14). IEEE, 2014.
- "Logically timed specifications in the AADL : a synchronous model of computation and communication (recommendations to the SAE committee on AADL)". L. Besnard, E. Borde, P. Dissaux, T. Gautier, P. Le Guernic, J.-P. Talpin. INRIA Technical Report n.446, 2014.
- "Timed behavioural modelling and affine scheduling of embedded software architectures in the AADL using Polychrony". L. Besnard, A. Bouakaz, T. Gautier, P. Le Guernic, Y. Ma, J.-P. Talpin, H. Yu. In Science of Computer Programming (SCP). Elsevier, 2014.
- "From AADL to timed abstract state machine: a certified model transformation". Z. Yang, K. Hu, D. Ma, J.-P. Bodeveix, L. Pi, J.-P. Talpin. In Journal of System and Software (JSS). Elsevier, 2014.
- "Constructive Polychronous Systems". J.-P. Talpin, J. Brandt, M. Gemünde, K. Schneider, and S. Shukla. In Science of Computer Programming (SCP). Elsevier, 2014.
- "Polychronous modeling, analysis, verification and simulation for timed software architectures". H. Yu, Y. Ma, T. Gautier, L. Besnard, P. Le Guernic, J.-P. Talpin. In Journal of Systems Architecture (JSA). Elsevier, 2013.
- "Formal verification of synchronous data-flow program transformations toward certified compilation". V.-C. Ngo, J.-P. Talpin, Gautier, P. Le Guernic, L. Besnard. In Frontiers of Computer Systems (FCS). Special issue on synchronous programming. Springer, 2013.
- "Exploring software architectures with Polychrony and Syndex". H. Yu, Y. Ma, T. Gautier, L. Besnard, J.-P. Talpin, P. Le Guernic, Y. Sorel (FCS). In Frontiers of Computer Systems. Special issue on synchronous programming. Springer, 2013.
- "Design of Safety-Critical Java Level 1 Applications Using Affine Abstract Clocks". A. Bouakaz and J.-P. Talpin. International Workshop on Software and Compilers for Embedded Systems (M-SCOPES'13). ACM, June 2013.
- "Buffer minimization in earliest-deadline first scheduling of dataflow graphs". A. Bouakaz and J.-P. Talpin. Conference on Languages, Compilers and Tools for Embedded Systems (LCTES'13). ACM, June 2013.
- "Toward polychronous analysis and validation for timed software architectures in AADL". Y. Ma, H. Yu, T. Gautier, L. Besnard, P. Le Guernic, J.-P. Talpin and Maurice Heitz.Design Analysis and Test in Europe (DATE'13). IEEE, April 2013.
- "Embedding polychrony into synchrony". J. Brandt, M. Gemünde, K. Schneider, S. Shukla, and J.-P. Talpin. In Transactions on Software Engineering (TSE). IEEE, 2012.
- "Representation of synchronous, asynchronous, and polychronous components by clocked guarded Actions". J. Brandt, M. Gemünde, K. Schneider, S. Shukla, and J.-P. Talpin. In Design Automation for Embedded Systems (DAES), Special Issue on Languages, Models and Model Based Design for Embedded Systems. Springer, 2012.
- "Constructive polychronous systems". J.-P. Talpin, J. Brandt, M. Gemünde, K. Schneider, and S. Shukla. Logical Foundations in Computer Science (LFCS'12). Springer, December 2012.
- "Affine data-flow graphs for the synthesis of hard real-time applications". A. Bouakaz, J.-P. Talpin, and J. Vitek. Application of Concurrency to System Design (ACSD'12). IEEE Press, June 2012.
- "Formal verification on compiler transformations on polychronous equations". V. C. Ngo, J.-P. Talpin, T. Gautier, P. Le Guernic, and L. Besnard. International Congerence on Integrated Formal Methods (IFM'11). Springer, June 2012.
- "From concurrent multi-clock programs to deterministic asynchronous implementations". Potop-Butucaru D., Sorel, Y., de Simone, R., Talpin, J.-P. In Fundamenta Informaticae (FI). IOS Press, 2011.
- "Integrating system descriptions by clocked guarded actions". J. Brandt, M. Gemünde, K. Schneider, S. Shukla, and J.-P. Talpin. Forum on Design Languages (FDL'11). IEEE, September 2011.
- "System synthesis from AADL using Polychrony". Y. Ma, H. Yu, T. Gautier, J.-P. Talpin, L. Besnard and P. Le Guernic. Electronic System Level Synthesis Conference (ESLSYN'11). IEEE, June 2011.
- "From concurrent multi-clock programs to concurrent multi-threaded implementations". V. Papailiopoulou, D. Potop-Butucaru, Y. Sorel, R. de Simone, L. Besnard and J.-P. Talpin. Electronic System Level Synthesis Conference (ESLSYN'11). IEEE, June 2011.
- "Polychronous controller synthesis from MARTE's CCSL constraints". Yu, H., Talpin, J.-P., Besnard, L., Gautier, T., Marchand, H., Le Guernic, P. ACM-IEEE Conference on Methods and Models for Codesign (MEMOCODE'11). IEEE, July 2011.
- "Two formal semantics for a subset of the AADL". Yang, Z., Hu, K., Bodeveix, J.-P., Pi, L., Ma, D., Talpin, J.-P. UML&AADL workshop at the IEEE International Conference on Engineering of Complex Computer Systems (ICECCS'11) . IEEE, 2011.
- "System-level co-simulation of integrated avionics using polychrony". Yu, H., Ma, Y., Glouche, Y., Talpin, J.-P., Besnard, L., Gautier, T., Le Guernic, P., Toom, A., and Laurent, O. ACM Symposium on Applied Computing (SAC'11). ACM, 2011.
- "Compositional design of isochronous systems". Talpin, J.-P., Ouy, J., Gautier,T., Besnard, L., Le Guernic, P. In Science of Computer Programming (SCP), Special Issue on APGES. Elsevier, 2011.
- "Synoptic : a domain-specific modeling language for space on-board application software". Cortier, A., Besnard, L., Bodeveix, J.-P., Buisson, J., Dagnat, F., Filali, M., Garcia, G., Ouy, J., Pantel, M., Rugina, A., Strecker, M., Talpin, J.-P. . Chapter in Synthesis of embedded software. Springer, 2010.
- "Compilation of polychronous data flow equations". Besnard, L., Gautier, T., Le Guernic, P., Talpin, J.-P. Chapter in Synthesis of embedded software. Springer, 2010.
- "A module language for typing Signal programs by contracts". Glouche, Y., Gautier, T. Le Guernic, P., Talpin, J.-P. Chapter in Synthesis of embedded software. Springer, 2010.
- "Interpretation of the AADL Behavior Annex into a Synchronous Formalism Using SSA". Ma, Y., Talpin, J.-P, Gautier, T. International Conference on Computer and Information Technology (ICCIT'10). IEEE Press, 2010.
- "A synchronous approach to threaded program verification". Johnson, K., Besnard, L., Gautier, T., Talpin, J.-P. Automated Verification of Critical Systems (AVOCS'10). EASST, 2010.
- "A higher-order extension for imperative synchronous languages". Vecchie, E., Talpin, J.-P, Boisgérault, S. Software and Compilers for Embedded Systems (SCOPES'10). ACM Press, 2010.
- "Synoptic: a domain-specific modeling language for onboard real-time software design". A . Cortier, J.P. Bodeveix, M. Filali, G. Garcia, E. Morand , M. Pantel, A. Rugina, M. Strecker, J.P. Talpin. Embedde Real-Time Software and Systems, Neptune Workshop (NEPTUNE'10). Génie Logiciel , 2010.
- "Modular interpretation of heterogeneous modeling diagrams into synchronous equations using static single assignment". Talpin, J.-P, Ouy, J., Gautier, T., Besnard, L., Cortier, A. Application of Concurrency to System Design (ACSD'10). IEEE Press, 2010.
- "Polychronous analysis of timing constraints in UML MARTE". Yue, H., Talpin, J.-P.,Besnard, L., Gautier, T., Mallet, F., André, C., de Simone, R. International Workshop on Model-Based Engineering for Real-Time Embedded Systems Design (MOBE-RTES'10). IEEE Press, 2010.
- "The synchronous hypothesis and polychronous languages". Potop-Butucaru D., De Simone, R., Talpin, J.-P. Chapter in Networked Embedded Systems. CRC Press, 2009.
- "Programming models for multi-core embedded systems". Jose, B., Xue, B., Shukla, S., Talpin, J.-P. Chapter in Multi-core Embedded Systems. Taylor and Francis, 2009.
- "Clock-driven distributed real-time implementation of endochronous synchronous programs". Potop-Butucaru D., De Simone, R., Sorel, Y., Talpin, J.-P.Embedded Software Conference (EMSOFT'09). ACM Press, 2009.
- "Automatic translation of C/C++ parallel code into synchronous formalism using an SSA intermediate form". Besnard, L., Gautier, T, Moy, M., Talpin, J.-P., Johnson, K., Maraninchi, F. Automated Verification of Cirtical Systems (AVOCS'09). EASST, 2009.
- "Synoptic: a domain-specific modeling language for embedded flight-software". A. Cortier, L. Besnard, J.-P. Bodeveix, J. Buisson, F. Dagnat, M. Filali, G. Garcia, T. Gautier, J. Ouy, M. Pantel, A. Rugina, M. Strecker, J.-P. Talpin. FM'09 Workshop on Formal Methods for Aerospace (FMA'09). Elsevier, 2009.
- "A boolean algebra of contracts for assume-guarantee reasoning". Glouche, Y., Le Guernic, P., Talpin, J.-P., Gautier, T. Formal Aspects of Component Software (FACS'09). Elsevier, 2009.
- "A module language for typing by contracts". Glouche, Y., Talpin, J.-P., Le Guernic, P., Gautier, T. NASA Formal Methods Symposium (NFM'09). Springer, 2009.
- "From concurrent multiclock programs to deterministic asynchronous implementations". Potop-Butucaru D., De Simone, R., Sorel, Y., Talpin, J.-P. Application of Concurrency to System Design (ACSD'09). IEEE Press, 2009.
- "Distributed simulation of AADL specifications in a polychronous model of computation". Ma, Y., Talpin, J.-P.,Shukla, S., Gautier, T. International Conference on Embedded Software and Systems (ICESS'09). IEEE Press, 2009.
- "Separate compilation and execution of imperative synchronous modules". Vecchie, E., Talpin, J.-P., Schneider, K. Design Analysis and Test in Europe (DATE'09). IEEE, April 2009.
- "A metamodel for the design of polychronous systems". Brunette, C., Talpin, J.-P., Gamatié, A., Gautier, T. Journal of Logic and Algebraic Programming (JLAP), Special Issue on Applying Concurrency Research to Industry. Elsevier, 2008.
- "On the automatic inference of synchronization logic for multi-threaded software synthesis from polychronous specifications". Jose, B., Shukla, S., Patel, H., Talpin, J.-P. ACM-IEEE Conference on Methods and Models for Codesign (MEMOCODE'08). IEEE, June 2008.
- "Virtual prototyping AADL architectures in a polychronous model of computation". Ma, Y., Talpin, J.-P.,Gautier, T. ACM-IEEE Conference on Methods and Models for Codesign (MEMOCODE'08). IEEE, June 2008.
- "Analysis of periodic clock relations in polychronous systems". Talpin, J.-P., Métivier, H., Gautier, T., Le Guernic, P. IFIP Working Conference on Distributed and Parallel Embedded Systems (DIPES'08). Springer, September 2008.
- "Compositional design of isochronous systems". Talpin, J.-P., Ouy, J., Besnard, L., Le Guernic, P. Design Analysis and Test in Europe (DATE'08). IEEE Press, March 2008.
- "Generating multi-threaded code from polychronous specifications". Jose, B., Patel, H., Shukla, S., Talpin, J.-P. Synchronous Languages, Applications, and Programming (SLAP'08). Elsevier, March 2008.
- "On the polychronous approach to embedded software design". Shukla, S. K., Suhaib, S. M., Mathaikutty, D. A., Talpin, J.-P. Next generation design and verification methodologies for distributed embedded systems (GM R&D WORKSHOP'07). Springer Verlag, 2007.
- "Separate compilation of polychronous specifications". Ouy, J., Talpin, J.-P., Besnard, L., Le Guernic, P. Formal Methods for Globally Asynchronous Locally Synchronous Design (FMGALS'07). Electronic Notes in Theoretical Computer Science, Elsevier, 2007.
- "Polychronous design of embedded real-time systems"Gamatié, A., Gautier, T., Le Guernic, P., Talpin, J.-P. ACM Transactions on Software Engineering and Methodology (TOSEM). ACM Press, 2006.
- "An algebraic theory for behavioral modeling and protocol synthesis in system design". Talpin, J.-P, Le Guernic, P. In Formal Methods in System Design (FMSD), Special Issue on formal methods for GALS design. Springer Verlag, 2006.
- "Polychronous mode automata". Talpin, J.-P., Brunette, C.,Gautier, T., Gamatié, A. Embedded Software Conference (EMSOFT'06). ACM Press, 2006.
- "Polychronous methodology for system design, a true concurrency approach". S. Suhaib, D. Mathaikutty, S. Shukla, J.-P. Talpin. High-level design, validation and test workshop (HLDVT'06). IEEE Press, November 2006.
- "A modeling paradigm for integrated modular avionics design". Brunette, C., Delamare, R., Gamatié, A., Gautier, T., Talpin, J.-P. Software Engineering and Advanced Application (SEAA'06). IEEE Press, 2006.
- "The Topcased project - a toolkit in open-source for critical application and system development". Vernadat, F., Percebois, C., Farail, P., Vingerhoeds, R., Rossignol, A., Talpin, J.-P., Chemouil,D. International Space System Engineering Conference - Data Systems in Aerospace (DASIA'06). Eurospace, May 2006.
- "Modeling multi-clocked data-flow programs using the Generic Modeling Environment". Brunette, C., Talpin, J.-P., Besnard, L., Gauthier, T. Synchronous Languages, Applications, and Programming (SLAP'06). Elsevier, March 2006.
- "Automated translation of C/C++ programs into a synchronous formalism". Kalla, H.,Talpin, J.-P., Berner, D., Besnard, L. International Conference on the Engineering of Computer Based Systems (ECBS'06). IEEE, March 2006.
- "A verification approach for GALS integration of synchronous components". F. Doucet, M. Menarini, I.H. Krueger, R. Gupta, and J.- P. Talpin. Electronic Notes in Theoretical Computer Science (ENTCS), v. 146(2). Elsevier, 2006.
- "Compositional behavioral modeling of embedded systems and conformance checking". Talpin, J.-P, Le Guernic, P., Shukla, S., Gupta, R. In International Journal on Parallel Processing (IJPP), special issue on testing of embedded systems. Springer, 2005.
- "The synchronous hypothesis and synchronous languages". Potop-Butucaru D., De Simone, R., Talpin, J.-P. Chapter in Embedded Systems Handbook. CRC Press, 2005.
- "Automated clock inference for stream function-based system level specifications". Talpin, J.-P., Shukla, S.High-level design, validation and test workshop (HLDVT'05). IEEE Press, November 2005.
- "From multi-clocked synchronous specifications to latency-insensitive systems". Talpin, J.-P., Potop-Butucaru, D., Ouy, J., Caillaud, B. Embedded Software Conference (EMSOFT'05). ACM Press, September 2005.
- "SystemCXML: an open-source extensible SystemC front-end using XML". Berner, D., Patel, H., Mathaikutty, D., Shukla, S., Talpin, J.-P. Forum on Specification and Design Languages (FDL'05). ECSI, September 2005.
- "A verification approach for GALS integration of synchronous components". Doucet, F., Menarini, M., Krueger, I.,Talpin, J.-P., Gupta, R. International Workshop on Formal Methods for Globally Asynchronous locally Synchronous Design (FMGALS'05). Electronic Notes in Computer Science. Elsevier, June 2005.
- "A functional programming framework for latency insensitive protocol validation"Suhaib, S.,Mathaikutty, D., Shukla, S., Berner, D.,Talpin, J.-P. International Workshop on Formal Methods for Globally Asynchronous locally Synchronous Design (FMGALS'05). Electronic Notes in Computer Science. Elsevier, June 2005.
- "Behavioral type inference for compositional system design". Talpin, J.-P., Berner, D., Shukla, S., Le Guernic, P., Gamatié, A., Gupta, R. Chapter in Formal Methods and Models for System Design. Kluwer Academic Publishers, 2004.
- "Algebraic theory for behavioral type inference". Talpin, J.-P., Le Guernic. Chapter in Formal Methods and Models for System Design. Kluwer Academic Publishers, 2004.
- "Capturing formal specifications into abstract models". Berner, D., Suhaib, S., Shukla, S., Talpin, J.-P. Chapter in Formal Methods and Models for System Design. Kluwer Academic Publishers, 2004.
- "Formal refinement checking in a system-level design methodology". Talpin, J.-P., Le Guernic, P., Shukla, S. K., Gupta, R., Doucet, F. Fundamenta Informaticae (FI), Special Issue on Applications of Concurrency to System Design. IOS Press, 2004.
- "Encapsulation and behavioural inheritance in a synchronous model of computation for embedded system services adaptation". Kerboeuf, M., Talpin, J.-P. Journal of Logics and Algebraic Programming (JLAP), special issue on process algebra and system architectures. Elsevier, 2004.
- "Modular design through component abstraction". Berner, D., Talpin, J.-P., Le Guernic, P., Shukla, S. K. International conference on compilers, architectures and synthesis for embedded systems (CASES'04). ACM Press, September 2004.
- "A behavioral type inference system for compositional system-on-chip design". Talpin, J.-P., Berner, D., Shukla, S. K., Gamatié, A., Le Guernic, P., Gupta, R. Application of Concurrency to System Design (ACSD'04). IEEE Press, June 2004.
- "Modeling and validation of asynchronous systems in synchronous frameworks". Mousavi, M., R., Le Guernic, P., Talpin, J.-P., Shukla, S., Basten, T. Design Analysis and Test Europe (DATE'04). IEEE Press, March 2004. Available as INRIA Research Report 4935.
- "Méthodes formelles pour la modélisation et l'analyse de systèmes". Talpin, J.-P. Thèse d'Habilitation à Diriger les Recherches (HDR). Université de Rennes, November 2003.
- "Polychrony for system design". Le Guernic, P., Talpin, J.-P., Le Lann, J.-C. Journal for Circuits, Systems and Computers (JCSC). Special Issue on Application Specific Hardware Design. World Scientific, August 2003.
- "Formal proof of a polychronous protocol for loosely time-triggered architectures". Kerboeuf, M., Nowak, D., Talpin, J.-P. International conference on formal engineering methods (ICFEM'03). Lectures Notes in Computer Science. Springer Verlag, November 2003.
- "Hard real-time implementation of embedded systems in JAVA". Talpin, J.-P., Gamatié, A., Berner, D., Le Dez, B., Le Guernic, P. International Workshop on Scientific Engineering of Distributed JAVA Applications (FIDJI'2003). Lectures Notes in Computer Science. Springer Verlag, November 2003.
- "Polychrony for formal refinement-checking in a system-level design methodology". Talpin, J.-P., Le Guernic, P., Shukla, S. K., Gupta, R., Doucet, F. Application of Concurrency to System Design (ACSD'03). IEEE Press, June 2003.
- "A polychronous model for high-level component-based system design". Talpin, J.-P., Le Guernic, P., Shukla, S. K., Gupta, R., Doucet, F. Design Analysis and Test Europe (DATE'03). IEEE Press, March 2003.
- "A protocol for loosely time-triggered architectures". Benveniste, A., Caspi, P., Le Guernic, P., Marchand, H., Talpin, J.-P., Tripakis, S. Embedded Software Conference (EMSOFT'02). Lectures Notes in Computer Science. Springer Verlag, October 2002.
- "Model checking robustness to desynchronization". Talpin, J.-P. Distributed and parallel embedded systems, IFIP World Computer Congress (DIPES'2002). Kluwer Academic Publishers, August 2002.
- "Specification and verification of a steam-boiler with Signal-Coq". Kerboeuf, M., Nowak, D., Talpin, J.-P. International Conference on Theorem Proving in Higher-Order Logics (TPHOLs'00). Springer Verlag, October 2000.
- "A new methodology for real-time distributed systems". Wang, Y., Talpin, J.-P., Benveniste, A., Le Guernic, P. IFIP International Conference on Formal Methods for Open Object-Based Distributed Systems (FMOODS'00). Kluwer Academic Publishers, September 2000.
- "A semantics of UML state-machines using synchronous pre-order transition systems". Wang, Y., Talpin, J.-P., Benveniste, A., Le Guernic, P. In International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC'00). IEEE Press, March 2000.
- "Timed polyhedra analysis for synchronous languages". Besson, F., Jensen, T., Talpin, J.-P. Static Analysis Symposium (SAS'99). Springer Verlag, September 1999.
- "Synchronous structures". Nowak, D., Talpin, J.-P., Le Guernic, P. International Conference on Concurrency Theory (CONCUR'99). Springer Verlag, August 1999.
- "A synchronous semantics of higher-order processes for modeling reconfigurable reactive systems". Talpin, J.-P., Nowak, D. International Conference on Foundations of Software Technology and Theoretical Computer Science (FSTTCS'98). Springer Verlag, December 1998.
- "Co-inductive axiomatization of a synchronous language". Nowak, D., Beauvais, J.-R., Talpin, J.-P. International Conference on Theorem Proving in Higher-Order Logics (TPHOLs'98). Springer Verlag, October 1998.
- "BDL, a language of distributed reactive objects". Talpin, J.-P., Benveniste, A., Caillaud, B., Jard, C., Bouziane, Z., Canon, H. International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC'98). IEEE Press, April 1998.
- "Region-based memory management". Tofte, M., Talpin, J.-P. Information and Computation (I&C), Vol. 132, pages 109-176. Academic Press, 1997.
- "An ML-like module system for the synchronous language SIGNAL". Nowak, D., Talpin, J.-P., Gautier, T., Le Guernic, P. European Conference on Parallel Processing (EUROPAR'97). Springer Verlag, August 1997.
- "Reactive types". Talpin, J.-P. International Joint Conference on the Theory and Practice of Software Development (TAPSOFT'97). Springer Verlag, April 1997.
- "Benchmarking implementations of functional languages with Pseudoknot, a float-intensive benchmark". Hartel, P., & al. Journal of Functional Programming, Vol. 6. Cambridge University Press, 1996.
- "The type and effect discipline". Talpin, J.-P., Jouvelot, P. Information and Computation (I&C), vol. 111, pages 245-296. Academic Press, 1994.
- "Implementation of the typed lambda calculus using a stack of regions". Tofte, M., Talpin, J.-P. Symposium on Principles of Programming Languages (POPL'94). ACM Press, January 1994. Received the 2004 ACM SIGPLAN Award for the most influential POPL paper.
- "Aspects théoriques et pratiques de l'inférence de types et d'effets". Talpin, J.-P. Thèse de Doctorat en Informatique de l'Université Paris VI. Ecole des Mines de Paris, May 1993.
- "Compiling FX on the CM-2". Talpin, J.-P., Jouvelot, P. Workshop on Semantics Analysis (WSA'93). Springer Verlag, September 1993.
- "The type and effect discipline". Talpin, J.-P., Jouvelot, P. Conference on Logic in Computer Science (LICS'92). IEEE Press, June 1992. Received the 2012 ACM-IEEE LICS Test-of-Time Award.
- "Polymorphic type, region and effect inference". Talpin, J.-P., Jouvelot, P. Journal of Functional Programming (JFP), Vol. Cambridge University Press, 1992.
Scientific service
With Rajesh Gupta, UCSD, and Sandeep Shukla, VTRL, we co-founded the ACM-IEEE Conference Series on Methods and Models for System Design, MEMOCODE. I co-chaired MEMOCODE in 2003, 2004, 2013, 2014, 2016, 2017. I am currently Associate Editor with the ACM Transactions on Embedded Computing Systems (TECS) and Springer's Journal on Frontiers of Computer Science (FCS). I served as Guest Editor for special issues of Springer's Formal on Methods in System Design, ACM Transactions on Embedded Computing Systems, IEEE Transactions on Industrial Informatics, IEEE Transactions on Computers. I participate(d) to the program committee of:
- ACM/IEEE Conference on Formal Methods and Models for System Design (MEMOCODE), 2003 to 2016
- ACM Embedded Systems Conference (EMSOFT), 2008, 2013, 2014
- ACM Symposium on Applied Computing (SAC), Embedded Systems Track (EMBS), 2006 to 2017
- ACM conference on languages, compilers and tools for embedded systems (LCTES), 2014 to 2017
- IEEE International Conference on Embedded Software and Systems (ICESS), 2015
- International Workshop on Software and Compilers for Embedded Systems (SCOPES), 2014 to 2017
- International Conference on Language and Automata Theory and Applications (LATA), 2014
- International Conference on Formal Aspects of Component Software (FACS), 2015
- International Symposium on Theoretical Aspects of Software Engineering (TASE), 2015, 2016
- European Symposium on Programming (ESOP), 2009
- IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2008
- Application of Concurrency to System Design (ACSD), 2007 to 2010, 2012, 2017
- IEEE International Symposium on Industrial Embedded Systems (SIES), 2005 to 2012
- IEEE International Conference on Embedded Software and Systems (ICESS), 2005, 2015
- IEEE Design, Automation and Test in Europe (DATE), 2003 to 2005
as well as in many international workshops like FMGALS'03-09, FESCA'04-05, SLAP'08, JTRES'10, HLDVT'11-16, ACVI'14-15, AVICPS'14, FTSCS'15, CRTS'15, IDEA'16.
Collaborative projects
- Networks of excellence Artist, Artist 2, Artist Design (2000-2009)
- NSF-INRIA project BALBOA with UCSD (2002-2009)
- DGE project TOPCASED (2005-2010)
- ANR project OPENEMBEDD (2006-2008, coordinator)
- IST project SPEEDS (2007)
- EADS Foundation grant (2006-2009)
- ANR project SPACIFY (2007-2010)
- ANR project FotoVP (2008-2010)
- Artemisia project CESAR (2009-2011)
- ITEA2 project OPEES (2010-2012, work-package leader)
- ANR project Verisync (2010-2013)
- INRIA associate project POLYCORE with VTRL (2011-2013)
- FUI project P (2011-2014)
- Regional project VeriGALS (2011-2014)
- FUI project CORAIL (2012-2015)
- USAF OSR grant FA8655-13-1-3049 (2013-2016)
- ANR project FEEVER (2013-2017)
- Toyota ITC grant (2014-2016)
- Mitsubishi Electrics R&D (2015+)
- ASTRI consulting grant (2016+)
- INRIA associate team Composite with UCSD's MESL (2017-2020)
Short bio
I have a Master in Theoretical Computer Science from University Paris VI.
I did my PhD Thesis at Ecole des Mines de Paris under the advisory of Pierre Jouvelot.
I worked three years at the European Computer-Industry Research Centre in Munich.
I joined INRIA in 1995, in the EPART project-team of Paul Le Guernic.
I led INRIA project-team ESPRESSO from 2000 to 2012.
I lead INRIA project-team TEA since 2015.
I am recipient of both the 2004 ACM SIGPLAN Award for the most influential POPL paper, with Mads Tofte,
and of the 2012 ACM-IEEE LICS "Test of Time" Award, with Pierre Jouvelot.
I also received the 2014 ITEA Award of Excellence for my contribution as work-package leader in the ITEA2 project OPEES (2010-2012) which, led by Gael Blondel, started the Polarsys Industry Working Group of the Eclipse foundation.
