Welcome to Erwan Raffin's professional homepage !

Currently, I'm working at CAPS entreprise, the Manycore Programming Company, a leading provider of software and solutions for HPC Community. CAPS entreprise enables companies to safely move to manycore processor technologies.

I have completed my Ph.D. in computer science in 2011 under the supervision of Prof. Christophe Wolinski at IRISA laboratory in the CAIRN team/project.

My Ph.D. dealt with “Run-time Reconfigurable Systems: Compilation and Synthesis Aspects”. My dissertation title is “Deployment of multimedia applications on coarse grained reconfigurable architecture: modeling using constraint programming”.

My PhD was supported by Technicolor (Thomson R&D France) and the French National Agency for Research and Technology (ANRT) under the CIFRE Grant N°2006/625.

During my Ph.D., I took part in the ROMA project. ROMA: Reconfigurable Operators for Multimedia Applications (2007-2010) is supported by ANR Architectures du Futur.

• “Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia Architecture” - improved and extended version
  Erwan Raffin, Christophe Wolinski, François Charot, Emmanuel Casseau, Antoine Floc’h, Krzysztof Kuchcinski, Stéphane Chevobbe and Stéphane Guyetant
  International Journal of Embedded and Real-Time Communication Systems (IJERTCS) 3 (2012): 1, doi:10.4018/jertcs.2012010101
  Link to the article.

• “Automatic Design of Application-Specific Reconfigurable Processor Extensions with UPaK Synthesis Kernel”
  Christophe Wolinski, Krzysztof Kuchcinski, Erwan Raffin
  ACM Transactions on Design Automation of Electronic Systems (TODAES), 15, 1 (2009)
  Link to the article.

• “Exploiting reconfigurable SWP operators for multimedia applications”
  Daniel Menard, Hai-Nam Nguyen, François Charot, Stéphane Guyetant, Jérémie Guillot, Erwan Raffin, Emmanuel Casseau
  36th International Conference on Acoustics, Speech and Signal Processing (ICASSP), Prague, Czech Republic, May 22-27, 2011
  Link to the paper.

• “Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia Architecture”
  Erwan Raffin, Christophe Wolinski, François Charot, Krzysztof Kuchcinski, Stephane Guyetant, Stephane Chevobbe and Emmanuel Casseau
  Conference on Design and Architectures for Signal and Image Processing (DASIP 2010), Edinburgh, Scotland.
  Best Paper Award - Web links: Technicolor article, ROMA article, DASIP article, CAIRN article.
  Please read IEEE copyright notice below before viewing the full paper :

• “Architecture-Driven Synthesis of Reconfigurable Cells”
  Christophe Wolinski, Krzysztof Kuchcinski, Erwan Raffin, François Charot
  12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools (DSD 2009), p531-538, Patras, Greece.

• “How constrains programming can help you in the generation of optimized application specific reconfigurable processor extensions”
  Christophe Wolinski, Krzysztof Kuchcinski, Kevin Martin, Erwan Raffin, François Charot
  International Conference on Engineering of Reconfigurable Systems & Algorithms (ERSA'09), Las Vegas, USA (invited paper).

• “Graph Constraints in Embedded System Design”
  Christophe Wolinski, Krzysztof Kuchcinski, Kevin Martin, Antoine Floch, Erwan Raffin, François Charot
  Workshop on Combinatorial Optimization for Embedded System Design (COESD 2010), Bologna, Italy
  Link to the paper.

• “Design of Processor Accelerators with Constraints”
  Christophe Wolinski, Krzysztof Kuchcinski, Kevin Martin, Erwan Raffin, François Charot
  8th workshop of the Network for Sweden-based researchers and practitioners of Constraint programming (SweConsNet 2009), Linköping, Sweden (invited talk). Slides

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