You are here

Security of Embedded Electronic Systems

Christophe Clavier (Xlim, Université Limoges) / Giorgio Di Natale (LIRMM, CNRS - Université Montpellier 2)
Salle Petri/Turing

Security of Embedded Electronic Systems :
DGA-MI and IRISA laboratory jointly organise a monthly seminar in Rennes on the security of embedded electronic systems (see below for the topics). This seminar is open to all people from academy and industry. For announcements (shared calendar), details, directions, and pratical aspects see

Registration to the announcements mailing list:
F I R S T  S E S S I O N   A N N O N C E M E N T S
10h30 - 11h30 : Nicolas Veyrat-Charvillon ( IRISA équipe CAIRN ) Exploiting Side-Channel Traces: the Impact of Computing Power
11h30 - 12h30 : Simon Stuker ( IRIT équipe SMAC ) Recherche de structures dans les graphes pour la comparaison d'un circuit électrique avec le plan spécifié

P R E S E N T A T I O N   O F   T H E   S E M I N A R
Embedded electronic systems and their associated softwares are used in an always increasing number of daily life, industrial and government applications. The security of these systems is a major societal, economic and sovereignty issue. This leads to increasingly activities  in research and development by scientists, industry and government services, and especially around the region around Rennes.
The topics that will be discussed during the seminar address the study, the analysis, the performance and security evaluation, the validation, and regulatory aspects of all components of secure embedded electronic systems. All these points will be addressed both at theoretical and experimental levels. Among the discussed topics, one can find: basic elements and components in electronic circuits (FPGA, ASIC, smart-cards, micro-controller), associated softwares, cryptographic primitives, crypto-processors and accelerators, secure storage, secure communication on chip, etc. One can also find secure architecture design, hardware/software co-design,
performances analysis, security modules (active and passive countermeasures, secure test systems, secure memories, secure communication on chip, etc.), side channel attacks, fault injection attacks, methods and tools for reverse engineering, CAD tools and formal tools for electronic (for design or test), etc.