Selected Recent Papers

 
 


  1. “GeCoS: A framework for prototyping custom hardware design flows” Antoine Floch, Tomofumi Yuki, Ali El Moussawi, Antoine Morvan, Kevin Martin, Maxime Naullet, Mythri Alle, Ludovic L'Hours, Nicolas Simon, Steven Derrien, François Charot, Christophe Wolinski, Olivier Sentieys,  SCAM 2013, Eindhoven, The Netherlands


  1. “Constraint Programming Approach to Reconfigurable Processor Extension Generation and Application Compilation”   Kevin Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, Francois Charot, International Journal of ACM Transactions on Reconfigurable Technology and Systems  TRETS 5(2): 10 ,2012,


  1. “Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia Architecture”  (improved and extended version) Erwan Raffin, Christophe Wolinski, Francois Charot,  Krzysztof Kuchcinski, Stephane Guyetant, Stephane Chevobbe and Emmanuel Casseau, International Journal of Embedded and Real-Time Communication Systems, IJERTCS, Volume 3: 1 Issues, 2012


  1. “Sélection d’instructions et ordonnancement parallèle simultanés pour la conception de processeurs spécialisés”  Antoine Floch, François Charot, Steven Derrien, Kevin Martin, Antoine Morvan, Christophe Wolinski, SympA 2011, Saint-Malo, France


  1. “Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia Architecture”  Erwan Raffin, Christophe Wolinski, Francois Charot,  Krzysztof Kuchcinski, Stephane Guyetant, Stephane Chevobbe and Emmanuel Casseau, DASIP 2010, Edinburgh, Scotland (best paper award)


  1. “Graph Constraints in Embedded System Design”  Christophe Wolinski, Krzysztof Kuchcinski, Kevin Martin, Antoine Floch,  Erwan Raffin, François Charot, COESD 2010, Bologna, Italy


  1. “Combined Scheduling and Instruction Selection for Processors with Reconfigurable Cell Fabric” Antoine Floch, Christophe Wolinski, Krzysztof Kuchcinski, ASAP 2010, Rennes, France


  1. “Design methodology for a high performance robust DVB-S2 decoder implementation”Florent Berthelot, François Charot, Charles Wagner, Christophe Wolinskit, DSD 2010, Lille, France


  1. “Energy Eficient Sensor Node Implementations” Jan Frigo, Vinod Kulathumani, Sean Brennan, Ed Rosten, Eric Raby, Christophe Wolinski, Charles Wagner and François Charot, FPGA 2010, Monterey, California, USA


  1. “Automatic Design of Application-Specific Reconfigurable Processor Extensions with UPaK Synthesis Kernel” Christophe Wolinski,  Krzysztof Kuchcinski and Erwan Raffin, Journal of ACM Transactions on Design Automation of Electronic Systems (TODAES) Volume 15 ,Issue 1, December 2009


  1. “How constrains programming can help you in the generation of optimized application specific reconfigurable processor extensions” Christophe Wolinski,  Krzysztof Kuchcinski,  Kevin Martin,  Erwan Raffin and François Charot, ERSA'09, Las Vegas, USA (invited talk)


  1. “Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system” Kevin Martin, Christophe Wolinski,  Krzysztof Kuchcinski, Antoine Floch and François Charot, ASAP 2009, USA


  1. “Constraint-Driven Identification of Application Specific Instructions in the DURASE system” Kevin Martin, Christophe Wolinski,  Krzysztof Kuchcinski, Antoine Floch and François Charot, SAMOS 2009, Greece


  1. “Architecture-Driven Synthesis of Reconfigurable Cells” Christophe Wolinski, Krzysztof Kuchcinski, Erwan Raffin   DSD 2009, Patras, Greece


  1. “A Generic Architecture of CCSDS Low Density Parity Check Decoder for Near-Earth Applications” Fabien Demangel, Nicolas Fau, Nicolas Drabik, François Charot, Christophe Wolinski, IEEE DATE 2009, Nice, France


  1. “Sélection automatique d’instructions et ordonnancement d’applications basés sur la programmation par contraintes” Kevin Martin, Christophe Wolinski,  Krzysztof Kuchcinski, Antoine Floch and François Charot, SympA 2009, Toulouse, France


  1. “Design of Accelerators with Constraints” Christophe Wolinski,  Krzysztof Kuchcinski, Kevin Martin, Antoine Floch and François Charot, SweConsNet Workshop, 2009, Linköping, Sweden


  1. “Automatic Selection of Application-Specific Reconfigurable Processor Extensions” Christophe Wolinski, Krzysztof Kuchcinski, DATE 2008, Munich, Germany


  1. “Area and Reconfiguration Time Minimization of the Communication Network in Regular 2D Reconfigurable Architectures” Christophe Wolinski, Krzysztof Kuchcinski, Jurgen Teich, Frank Hannig,  FPL'08 Heidelberg, Germany


  1. “A New Multi Gigabit String Matching Engine” Georges Adouko, François Charot, Christophe Wolinski,  ERSA'08, USA


  1. “A New Powerful Scalable Generic Multi-Standard LDPC Decoder Architecture” François Charot, Christophe Wolinski, Nicolas Fau, François Hamon,  Palo Alto, CA, FCCM’08, USA


  1. “Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures” Christophe Wolinski, Krzysztof Kuchcinski, Jurgen Teich, Frank Hannig,  Palo Alto, CA, FCCM’08, USA


  1. “A Parallel and Modular Architecture for 802.16e LDPC Codes” François Charot, Christophe Wolinski, Nicolas Fau, François Hamon,  DSD 2008, Parma, Italy


  1. “Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures” Christophe Wolinski, Krzysztof Kuchcinski, Jurgen Teich, Frank Hannig, DSD 2008, Parma, Italy


  1. “Exploitation optimale des circuits reconfigurables FPGA pour la mise en oeuvre d'un moteur de recherche de motifs” Georges Adouko, François Charot, Christophe Wolinski (International Francophone Conference) SympA 2008, Fribourg, Switzerland


  1. “Graph Constraints for Reconfigurable System Optimization” C.Wolinski, K.Kuchcinski, SweConsNet Workshop, 2008, Göteborg, Sweden


  1. “Automatic Identification and Selection of Application-Specific Reconfigurable Processor Extensions” C.Wolinski, K.Kuchcinski, ArtistDesign Workshop, 2008, Lund, Sweden


  1. “Identification of Application Specific Instructions Based on Subgraph Isomorphism Constraints” Christophe Wolinski, Krzysztof Kuchcinski ASAP Canada, Montreal, 2007


  1. “Computation Patterns Identification for Instruction Set Extensions Implemented as Reconfigurable Hardware” Christophe Wolinski, Krzysztof Kuchcinski, ERSA 2007, Las Vegas, USA


  1. “A Run-Time Re-configurable Parametric Architecture for Local Neighborhood Image Processing”, Reid B. Porter, Jan R. Frigo, Maya Gokhale, Christophe Wolinski, François Charot, Charles Wagner  DSD 2006, Dubrovnik, Croatia


  1. “A Programmable, Maximal Throughput Architecture for Local Neighborhood Image Processing”, Reid B. Porter, Jan R. Frigo, Maya Gokhale, Christophe Wolinski, François Charot, Charles Wagner, FCCM 2006


  1. "DIGITAL SYSTEM DESIGN", Architectures, Methods and Tools, IEEE Computer Society, Christophe Wolinski (Editor) Porto, Portugal, 2005,


  1. “A Constraints Programming Approach for Fabric Cell Synthesis”, Christophe Wolinski, Krzysztof Kuchcinski   DSD 2005, Porto, Portugal


  1. “A constraints programming approach to communication scheduling”, Ch. Wolinski, K. Kuchcinski, M.Gokhale  FPGA 2004: Monterey, CA, USA


  1. “Communications Scheduling for Concurrent Processes on Reconfigurable Computers”, M.Gokhale, Ch.Ahrens, J.Frigo, Ch.Wolinski FCCM 2004 Napa, California


  1. “A Constraints Programming Approach to Communication Scheduling on SoPC Architectures”, C.Wolinski, K.Kuchcinski, M. Gokhale DSD 2004. Rennes, France


  1. "Global Approach to Scheduling Complex Behaviors based on Hierarchical Conditional Dependency Graphs and Constraint Programming" Kszysztof Kuchcinski, Christophe Wolinski" Journal of Systems Architecture in press, Elsevier Science, Volume 49, Issues 12-15, Pages 485-668, December 2003


  1. "Polymorphous fabric-based systems: Model, tools, applications." Ch. Wolinski, M. Gokhale, and K. McCabe. Journal of Systems Architecture, Elsevier Science, Volume 49, Issues 4-6, September 2003


  1. "Experience with a Hybrid Processor: K-Means Clustering" Maya Gokhale, Jan Frigo,Kevin McCabe, James Theiler, Christophe Wolinski, Dominique Lavenier" Special Issues of the Journal of Supercomputing Vol 24, No. 4, 2003


  1. “A Preliminary Study of Molecular Dynamics on Reconfigurable Computers” Christophe Wolinski, Frans Trouw, Maya Gokhale, ERSA’03 ,Fev.2003


  1. "Fabric-Based Systems: Model, Tools, Applications" Christophe Wolinski, Maya Gokhale, Kevin McCabe, FCCM'03, IEEE Symposium on Field-Programmable Custom Computing Machines Napa Valley, California April 2003, Jan. 2003


  1. “Rapid Construction of Reconfigurable Computing Fabrics for Systems on a Programmable Chip” Christophe Wolinski, Maya Gokhale, Kevin McCabe, IEEE HPCA/SSRS ‘03, Anaheim, California, February 8-12, 2003


  1. "A New Polymorphous Computing Fabric." Christophe Wolinski, Maya Gokhale, Kevin McCabe, IEEE Micro, Design and Test of Systems on Chip september/octobre 2002


  1. “Efficient Scheduling of Conditional Behaviors for High Level Synthesis” A.Kountouris, C.Wolinski, ACM Transactions on Design Automation of Electronic Systems, volume 7, Issues 3 July 2002


  1. "Evolvable Hardware for Image Data Mining" Reid Porter, N. Harvey, M. Gokhale, C. Wolinski, Group Poster at 2002 NASA/DoD Conference on Evolvable Hardware, July, 2002, Alexandria, Virginia, USA


  1. “A Reconfigurable Computing Fabric” Christophe Wolinski, Maya Gokhale, Kevin McCabe ERSA’02, Las Vegas, USA, june 2002


  1. “High-Level Synthesis Using Hierarchical Conditional Dependency Graphs in the CODESIS System” A.Kountouris, C.Wolinski, Jean-Christophe LeLann, Special Issues of the Journal of Systems Architecture, Elsevier Science Volume 47, Issue 3-4, April 2001


  1. “Synthesis of Conditional Behaviors Using Hierarchical Conditional Dependency Graphs and Constraint Logic Programming” K.Kuchcinski, C.Wolinski Proceedings of EUROMICRO’01, IEEE Computer Society Press, Warsaw, Poland, september 2001


  1. "High-Level Synthesis Using SIGNAL Description Language in the CODESIS System" C.Wolinski, 7th Synchronous Workshop St. Marc nov. 2000


  1. “Hierarchical Conditional Dependency Graphs as a Unifying Design Representationin the CODESIS High-Level Synthesis System” A.Kountouris, C.Wolinski, Proceedings of ISSS’00, IEEE Computer Society Press, Madrid, Spain, September 2000


  1. “Efficient Scheduling of Conditional Behaviors Using Hierarchical Conditional Dependency Graphs in CODESIS System” A.Kountouris, C.Wolinski, Proceedings of EUROMICRO’00, IEEE Computer Society Press, Maastricht, The Netherlands, september 2000


  1. "High Level Pre-Synthesis Optimization Steps using Hierarchical Conditional Dependency Graphs" A.Kountouris, C.Wolinski, Proceedings of EUROMICRO,99 , IEEE Computer Society Press, Milano, Itali, AUG 1999


  1. “Load balancing and Functional Unit Assignment in High-Level Synthesis” J.C.Le Lann, C.Wolinski SCI’99/ISAS’99 Florida July 31 - August 4, 1999


  1. "Combining Speculative Execution and Conditional Ressource Sharing to Efficiently Schedule Conditional Behaviors" A.Kountouris, C.Wolinski, Proceedings of ASP-DAC’99 , IEEE Computer Society Press, Hong Kong, Jan 1999


  1. "Hierarchical Conditional Dependency Graphs for Mutual Exclusiveness Identification" A.Kountouris, C.Wolinski, Proceedings of VLSI’99 , IEEE Computer Society Press, Goa, INDIA, Jan 1999


  1. "False Path Analysis based on a Hierarchical Control Representation" A.Kountouris, C.Wolinski, Proceedings of ISSS’98 , IEEE Computer Society Press, Hsinchu, Taiwan, Dec 1998


  1. "Hierarchical Conditional Dependency Graps for Conditional Ressource Sharing" A.Kountouris, C.Wolinski, Proceedings of EUROMICRO, 98 , IEEE Computer Society Press, Vasteras, Sweden, AUG 1998


  1. "A method for the Generation of HDL Code at the RTL level from a High Level Formal Specification Language" A.Kountouris, C.Wolinski, Proceedings of MWS CAS’97, IEEE Computer Society Press, Sacramento, USA, AUG. 1997


  1. “Human-robot coordination” P.Y.Glorennec, C.Wolinski KES’1997, Australie, Adlaide