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Introduction
Reconfigurable systems have been considered by research and industry for some years thanks to possibilities opened up initially by Field Programmable Gate Arrays (FPGA) technology and more recently by reconfigurable processors.
Recent evolutions in technology and modern hardware systems confirm that reconfigurable systems are increasingly used in recent applications or embedded into more general system-on-chip. Rapidly changing application standards in fields such as communications and information security ask for frequent modifications of the devices. Hardware reconfiguration can adapt the system to changing conditions. Moreover, this adaptation of a flexible hardware to the application software leads to significant gain in terms of performance and energy efficiency.
However, reconfigurable systems raise several challenges like the architecture structure itself, its dynamic reconfiguration capabilities or the associated compilation/synthesis methods and tools.
Short articles, presentations, videos on our research activities
List of Research Topics
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Design of dynamically reconfigurable or domain-specific architectures with focus on dynamic behavior, reconfiguration management and energy efficiency
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Architecture description language for reconfigurable architectures
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Reconfigurable memory structure
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Multimode components
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Low-power or energy-efficient architectures
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Development of associated compilation and transformation techniques
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Pattern-based compilation and configuration synthesis for reconfigurable platform
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Synthesis of nested loop accelerator from C specification
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Multi-mode IP synthesis
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Resource or energy constrained optimization of signal processing algorithms
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Precoding schemes for 4G/MIMO systems
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Cooperative MIMO for sensor networks
- Hardware/sofware for cryptographic and security systems
- Computer arithmetic
Gecos: a source-to-source compiler for high-level synthesis