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Master On-Chip Jitter Measurement to Improve the Quality of Oscillator-Sampling based RNGs
 
Master Arithmetic Operators for ECC Cryptoprocessor with Protection Against Fault Attacks
 
Master Dynamic Voltage Scaling and Power Gating in SRAM Memory Structure for Low-Power Embedded FPGAs
 
Master Implementation and Power Estimation of some basic Functions of WSN Applications on a Low-Power FPGA Accelerator
 
Master Design of fault-tolerant coarse-grained reconfigurable architectures through self-reconfiguration
 
Master Impact of some Environment Parameters on the Performance and Randomness Quality of TRNGs in VLSI
 
Master Companding techniques for Peak to Average Power Ratio Reduction in Wireless Orthogonal Frequency Division Multiplexing Communication Systems
 
Master Energy Optimization of Network-On-Chip
 
Master Evaluation of overflow effect on performance
 
Master Accuracy and convergence evaluation of adaptive filters in fixed-point arithmetic
 
Master System impulse response determination by linear prediction approach
 
Master Energy-efficient MAC protocols for cooperative strategies in Wireless Sensor Networks
 
Master Design and Implementation of dmin-based precoding for MIMO wireless systems
 
Master Energy Optimization of Wireless Acoustic Sensor Networks
 
Master High-Performance Fixed-Point Architecture for Financial Applications
 
Master Dynamic Precision Scaling for Low-Power Wireless Receivers
 
Master Power Optimized Reconfiguration Structure for Low-Power FPGAs
 
Master Spatio-temporal scheduling for Dynamically Reconfigurable Architecture
 
Master Aide à l’exploration pour l’implémentation d’applications sur architectures
 
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14.02.2012
11:00-12:00 Logic Functions Decomposition in Reed-Muller Spectral Domain